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Exercise from the chapter "Resistor networks"

Two faults

Level 3 of 5 · Skills: Build

Statement

Two faults hide in this R1 ∥ R2 circuit controlled by K1.

Fix both to get back to the target diagram, current included.

3 hints from Bastaya available in the lab
Solution

Switch open: no branch is supplied. Chip F3-F4 missing: even with K1 closed, only R1 conducts. Both fixed: I = 9 / 149.9 ≈ 60 mA.

Course sheet of the chapter : Resistor networks

This chapter is covered by the paths: Discovery

Other exercises of the chapter

Simulated time00:00:00
Q = I·t-
W = P·t-

Workbench

Circuit diagram CEI 60617

How does it work?

The perfboard: each big hole is a circuit node. You push a single leg of a component (resistor, lamp...) into it. The 4 small holes around it are connected to it: that is where chips and leads plug in.

  1. Drag a component onto the board: it snaps onto the grid. R rotates it.
  2. To join neighbouring big holes, click Jumper chip in the palette (or C) then drag on the board: a line of chips is laid at once. Bridged holes become a single node.
  3. For long links and for the power supply (placed next to the board), drag a lead from one big hole to another (or to a terminal).
  4. As soon as a loop is closed, the circuit is solved in real time (Ohm + Kirchhoff) and the diagram follows.
  5. Zoom with the wheel (or + / −, two-finger pinch); drag the background to pan, 0 fits the board. The + buttons around the board add a row or a column.

Del delete · R rotate · C chip brush · Esc cancel · wheel zoom · drag the background to pan

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